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| preliminary data sheet october 2001 l9214a/g low-cost ringing slic introduction the agere systems inc. l9214 is a subscriber line interface circuit that is optimized to provide a very low-cost solution for short- and medium-loop applica- tions. this device provides the complete set of line interface functionality, including power ringing needed to interface to a subscriber loop. this device has the capability to operate with a v cc supply of 3.3 v or 5 v and is designed to minimize external components required at all device interfaces. features low-cost solution onboard ringing generation with software adjust- able crest factor switching flexible v cc options: ? 3.3 v or 5 v v cc ? no ?5 v required power control options: ? power control resistor ? automatic battery switch to minimize off-hook power eight operating states: ? scan mode for minimal power dissipation ? forward and reverse battery active ? on-hook transmission states ? ring mode ? disconnect mode low on-hook power: ? 25 mw scan mode ? 165 mw active mode two slic gain options to minimize external com- ponents in codec interface loop start, ring trip, and ground key detectors programmable current limit on-hook and scan mode line voltage clamp thermal protection 48-pin mlcc, 32-pin plcc, and 28-pin sog (please contact your agere sales representative for availability) packages applications voice over internet protocol (voip) cable modems terminal adapters (ta) wireless local loop (wll) telcordia technologies ? gr-909 access network termination (nt) pbx key systems description this device is optimized to provide battery feed, ring- ing, and supervision on short- and medium-loop plain old telephone service (pots) loops. supported round trip loop length is up to 1000 ? . this device provides power ring to the subscriber by the use of line reversal to create either a sine wave ringing signal with a pwm input or a trapezoidal ring- ing signal with a selectable crest factor from a square wave input. it provides forward and reverse battery feed states, on-hook transmission, a low-power scan state, and a forward disconnect state. the device requires a v cc and line feed battery to operate. v cc may be either a 3.3 v or a 5 v supply. the ringing signal is derived from the high-voltage battery. an automatic battery switch is included to allow for use of a second lower voltage battery in the off-hook mode, thus minimizing short-loop off-hook power consumption and dissipation. if the user desires single battery operation, a power resistor is required to reduce the power dissipation in the slic. loop closure, ring trip, and ground key detectors are available. the loop closure detector has a fixed threshold with hysteresis. the ring trip detector and ground key detector threshold and time constants are externally set. the dc current limit is programmed by an external resistor, the maximum current limit determined by the vcc supply. the overhead voltage for this device is fixed and the device is capable of supporting 3.17 db into a 600 ? load with minimal overhead. the device is offered with two gain options. this allows for an optimized codec interface, with minimal external components regardless of whether a first- generation or a programmable third-generation codec is used.
preliminary data sheet october 2001 low-cost ringing slic l9214a/g 2 agere systems inc. table of contents contents page introduction..................................................................1 features ....................................................................1 applications...............................................................1 description ................................................................1 features ......................................................................4 description...................................................................4 architecture diagram...................................................7 pin information ............................................................8 operating states........................................................12 state definitions ........................................................12 forward active (fast polarity reversal) .................12 off-hook................................................................12 on-hook................................................................12 forward active (slow polarity reversal).................12 off-hook................................................................12 on-hook................................................................12 reverse active (fast polarity reversal) .................13 off-hook................................................................13 on-hook................................................................13 reverse active (slow polarity reversal) ................13 off-hook................................................................13 on-hook................................................................13 scan........................................................................13 disconnect ..............................................................13 ring.........................................................................13 thermal shutdown..................................................13 absolute maximum ratings.......................................14 electrical characteristics ...........................................15 test configurations ...................................................22 applications ...............................................................24 power control .........................................................24 dc loop current limit..............................................25 overhead voltage ...................................................25 active mode .........................................................25 scan mode ...........................................................25 on-hook transmission mode...............................25 ring mode............................................................26 contents page loop range ........................................................... 26 battery reversal rate ............................................ 26 supervision............................................................... 27 loop closure.......................................................... 27 ring trip ................................................................ 27 tip or ring ground detector .................................. 27 power ring ............................................................ 27 periodic pulse metering (ppm) ................................ 29 ac applications ......................................................... 29 ac parameters........................................................ 29 codec types .......................................................... 29 first-generation codecs ..................................... 29 third-generation codecs .................................... 29 ac interface network .............................................. 29 design examples ................................................... 30 first-generation codec ac interface network ? resistive termination ...................... 30 example 1, real termination .............................. 31 first-generation codec ac interface network ? complex termination ....................... 34 complex termination impedance design example............................................................ 34 ac interface using first-generation codec ......... 33 transmit gain...................................................... 35 receive gain....................................................... 36 hybrid balance .................................................... 36 blocking capacitors............................................. 37 third-generation codec ac interface network ? complex termination ....................... 40 outline diagram........................................................ 41 28-pin sog............................................................ 42 32-pin plcc .......................................................... 43 48-pin mlcc.......................................................... 44 48-pin mlcc, jedec mo-220 vkkd-2................ 45 ordering information................................................. 46 preliminary data sheet october 2001 low-cost ringing slic l9214a/g agere systems inc. 3 table of contents (continued) figures page figure 1. architecture diagram ...................................7 figure 2. 28-pin sog diagram ..................................8 figure 3. 32-pin plcc diagram .................................8 figure 4. 48-pin mlcc diagram .................................9 figure 5. basic test circuit (3 ren configuration) ..22 figure 6. metallic psrr ...........................................23 figure 7. longitudinal psrr ....................................23 figure 8. longitudinal balance .................................23 figure 9. ac gains ....................................................23 figure 10. ringing waveform crest factor = 1.6 .....27 figure 11. ringing waveform crest factor = 1.2 .....27 figure 12. ring operation ........................................28 figure 13. ac equivalent circuit ................................31 figure 14. agere t7504 first-generation codec; resistive termination (5 ren configuration)...........................................32 figure 15. interface circuit using first-generation codec (blocking capacitors not shown) ..............................................35 figure 16. ac interface using first-generation codec (including blocking capacitors) for complex termination impedance ......37 figure 17. agere t7504 first-generation codec; complex termination with power control resistor (3 ren configuration)................38 figure 18. third-generation codec ac interface network; complex termination (3 ren configuration)...........................................40 tables page table 1. pin descriptions ......................................... 10 table 2. control states ............................................ 12 table 3. typical operating characteristics .............. 14 table 4. thermal characteristics.............................. 14 table 5. environmental characteristics ................... 15 table 6. 5.0 v supply currents ............................... 15 table 7. 5. 0 v powering .......................................... 15 table 8. 3.3 v supply currents ................................ 16 table 9. 3.3 v powering .......................................... 16 table 10. two-wire port .......................................... 17 table 11. analog pin characteristics ...................... 18 table 12. ac feed characteristics ........................... 19 table 13. logic inputs and outputs (v cc = 5.0 v) .............................................. 20 table 14. logic inputs and outputs (v cc = 3.3 v) ............................................ 20 table 15. ringing specifications ............................. 20 table 16. ring trip (3 ren configuration) .............. 21 table 17. ring trip (5 ren configuration)............... 21 table 18. typical active mode on- to off-hook tip/ring current-limit transient response ................................................ 25 table 19. fb1/fb2 values vs. typical ramp time at v bat1 = ? 65 v ....................................... 26 table 20. l9214 parts list for agere t7504 first-generation codec; resistive termination .............................................. 33 table 21. l9214 parts list for agere t7504 first- generation codec; complex termination with power control resistor .................... 38 table 22. l9214 parts list for agere t8536 third-generation codec meter pulse application ac and dc parameters; fully programmable ................................ 41 preliminary data sheet october 2001 low-cost ringing slic l9214a/g 4 agere systems inc. features onboard balanced trapezoidal ringing generation, 40 vrms, 1.2 crest factor: ? 3 ren ring load (2330 ? + 24 f), 600 ? loop ? 2 ren ring load (3500 ? + 16 f), 1000 ? loop ? 2 ren ring load (3500 ? + 1.8 f), 500 ? loop ? no ring relay ? no bulk ring generator required ? 15 hz to 70 hz ring frequency supported power supplies requirements: ? v cc talk battery and ringing battery required ? no ? 5 v supply required ? no high-voltage positive supply required flexible vcc options: ? 3.3 v or 5 v v cc operation ? 3.3 v or 5 v v cc interchangeable and transparent to users power control options: ? automatic battery switch ? power control resistor minimal external components required ten operating states: ? forward active, fast polarity reversal ? reverse active, fast polarity reversal ? forward active, slow polarity reversal ? reverse active, slow polarity reversal ? scan ? disconnect ? ringing, line forward with high slope ? ringing, line reverse with high slope ? ringing, line forward with low slope ? ringing, line reverse with low slope unlatched parallel data control interface low slic power: ? scan 24 mw (v cc = 5.0 v) ? forward/reverse active 148 mw (v cc = 5.0 v) ? scan 17 mw (v cc = 3.3 v) ? forward/reverse on-hook 135 mw (v cc = 3.3 v) supervision: ? loop start, fixed threshold with hysteresis ? ring trip filtering, fixed threshold not a function of battery voltage, user adjustable with an external resistor ? common-mode current for ground key applica- tions, user-adjustable threshold adjustable current limit: ? 10 ma to 45 ma programming range at 5 v vcc ? 10 ma to 35 ma programming range at 3.3 v vcc overhead voltage: ? automatically adjusted in active mode ? clamped <56.5 v in scan and on-hook modes thermal shutdown protection with hysteresis longitudinal balance: ? etsi/itu-t balance ? gr-909 meter pulse compatible ac interface: ? two slic gain options to minimize external com- ponents required for interface to first- or third-gen- eration codecs ? sufficient dynamic range for direct coupling to codec output 28-pin sog, 32-pin plcc, and 48-pin mlcc pack- age options 90 v cbic-s technology description the l9214 is designed to provide battery feed, ringing, and supervision functions on short and medium plain old telephone service (pots) loops. supported round- trip loop length is up to 1000 ? of wiring resistance plus handset or ringing load. this device is designed to min- imize power in all operating states. the l9214 offers eight operating states. the device assumes use of a lower-voltage talk battery, a higher- voltage ringing battery and a single v cc supply. the l9214 requires only a positive v cc supply. no ? 5 v supply is needed. the l9214 can operate with a v cc of either 5.0 v or 3.3 v, allowing for greater user flexibility. the choice of v cc voltage is transparent to the user; the device will function with either supply volt- age connected. two batteries may be used: 1. a high-voltage ring battery (v bat1 ). v bat1 is a maxi- mum ? 70 v and is used for power ringing, scan, and on-hook transmission modes. this supply is current limited to the maximum power ringing current of approximately 90 mapeak. 2. a lower-voltage talk battery (v bat2 ). v bat2 is nor- mally used for active mode powering. alternatively, operation may be from a single high-volt- age battery supply with a power control resistor to reduce the power dissipation in the slic. preliminary data sheet october 2001 low-cost ringing slic l9214a/g agere systems inc. 5 description (continued) forward and reverse battery active modes are used for off-hook conditions. since this device is designed for short- and medium-loop applications, the lower-voltage v bat2 is normally applied during the forward and reverse active states . battery reversal is quiet, without breaking the ac path. the rate of battery reversal may be ramped to control switching time. the magnitude of the overhead voltage in the forward and reverse active modes allows for an undistorted sig- nal of 3.17 dbm into 600 ? . the ring trip detector is turned off during active modes to conserve power. on-hook transmission is not permitted in the scan mode. in this mode, the tip ring voltage is derived from the higher v bat1 rather than v bat2 . in the scan and active modes, the overhead voltage is set such that the tip/ring open loop voltage is 42.5 v minimum for a primary battery of 63 v to 70 v for com- patibility with maintenance termination units (mtus). also, the maximum voltage with respect to ground (tip or ring to ground) is 56.5 v to comply with ul ? 1950/60950 annex m.2 method b and iec ? 60950 (quiet interval of ringing). if the primary battery is below ? 63 v, the magnitude of the tip/ring open circuit voltage is approximately 17 v less than the battery. to minimize on-hook power, a low-power scan mode is available. in this mode, all functions except off-hook supervision are turned off to conserve power. on-hook transmission is not allowed in the scan mode. a forward disconnect mode is provided, where all cir- cuits are turned off and power is denied to the loop. the device offers a ring mode, in which a power ring signal is provided to the tip/ring pair. during the ring mode, the user, by use of the input states, performs line reversals at the required frequency, which gener- ates the power ringing signal. this signal may be applied continuously but is normally cadenced to meet country-specific requirements. the input states are normally set to an active state when power ringing is halted to enable on-hook transmission. the ring trip detector and common-mode current detector are active during the ring mode. the user may adjust the crest factor of the ring signal by selecting one of the two slew rates. the two rates, high or low, allow the designer to chose one set of external capacitors to meet the crest factor range of 1.2 to 1.6 over a 3:1 frequency range by software control alone. for increased power efficiency, the crest factor should be kept as low as possible. with maximum v bat1 , the l9214 has sufficient power to ring a 3 ren (2310 ? + 24 f) ringing load into 600 ? of physical wiring resistance. with maximum v bat1 , the l9214 has sufficient power to ring a 2 ren (3500 ? + 16 f) ringing load into < 1000 ? of physical wiring resistance. loop ranges may be expanded by applying a lower crest factor trapezoidal input waveform. this feature eliminates the need for a separate external ring relay, associated external circuitry, and a bulk ring- ing generator. see the applications section of this data sheet for more information. where ppm is required, it is injected into the audio receive pins (ac-coupled). ppm shaping must be done externally and the ppm level must be within the 1.12 vrms (3.17 dbm, 600 ? ) level set by the amplifier overhead in the active state. both the ring trip and loop closure supervision func- tions are included. the loop closure has a fixed typical 10 ma on- to off-hook threshold in the active and scan mode. in either case, there is a 2 ma hysteresis. the ring trip detector requires a simple filter at the input. the ring trip threshold internally at a given battery volt- age is fixed, but the threshold can be adjusted through an external voltage divider. typical ring trip threshold is 20.1 ma for a ? 65 v v bat1 . a common-mode current detector for tip or ring ground detection is included for ground key applications. the threshold is user programmable via external resistors. see the applications section of this data sheet for more information on supervision functions. preliminary data sheet october 2001 low-cost ringing slic l9214a/g 6 agere systems inc. description (continued) longitudinal balance is consistent with european etsi and north american gr-909 requirements. specifica- tions are given in table 10. data control is via a parallel unlatched control scheme. the dc current limit is programmable in the active modes by use of an external resistor connected between dcout and i prog . design equations for this feature are given in the dc loop current limit section within the applications section of this data sheet. programming range is 15 ma to 45 ma with v cc = 5.0 v and 15 ma to 35 ma with v cc = 3.3 v. program- ming accuracy is 10% over this current range. circuitry is added to the l9214 to minimize the inrush of current from the v cc supply and to the battery supply during an on- to off-hook transition, thus saving in power supply design cost. see the applications section of this data sheet for more information. transmit and receive gains have been chosen to mini- mize the number of external components required in the slic-codec ac interface, regardless of the choice of codec. the l9214 uses a voltage feed-current sense architec- ture; thus, the transmit gain is a transconductance. the l9214 transconductance is set via a single external resistor, and this device is designed for optimal perfor- mance with a transconductance set at 300 v/a. the l9214 offers an option for a single-ended to differ- ential receive gain of either 8 or 2. these options are mask programmable at the factory and are selected by choice of product code. a receive gain of 8 is more appropriate when choosing a first-generation type codec where termination imped- ance, hybrid balance, and overall gains are set by external analog filters. the higher gain is typically required for synthesization of complex termination impedance. a receive gain of 2 is more appropriate when choosing a third-generation type codec. third-generation codecs will synthesize termination impedance and set hybrid balance and overall gains. to accomplish these func- tions, third-generation codecs typically have both ana- log and digital gain filters. for optimal signal to noise performance, it is best to operate the codec at a higher gain level. if the slic then provides a high gain, the slic output may be saturated causing clipping distor- tion of the signal at tip and ring. to avoid this situation, with a higher gain slic, external resistor dividers are used. these external components are not necessary with the lower gain offered by the l9214. see the appli- cations section of this data sheet for more information. the l9214 is internally referenced to 1.5 v. the slic output vitr is referenced to agnd; therefore, it must be ac-coupled to the codec input. however, the slic inputs rcvp/rcvn are floating inputs. if there is not feedback from rcvp/rcvn to vitr, rcvp/rcvn may be directly coupled to the codec output. if there is feedback from rcvp/rcvn to vitr, rcvp/rcvn must be ac coupled to the codec output. the l9214 is thermally protected to guard against faults. upon reaching the thermal shutdown tempera- ture, the device will enter an all-off mode. upon cool- ing, the device will re-enter the state it was in prior to thermal shutdown. hysteresis is built in to prevent oscillation. the l9214 is packaged in the 28-pin sog, 32-pin plcc and 48-pin mlcc surface-mount packages. the l9214a is set for gain of eight applications, and the l9214g is set for gain of two applications. preliminary data sheet october 2001 low-cost ringing slic l9214a/g agere systems inc. 7 architecture diagram 12-3530.c (f) figure 1. architecture diagram i ref vitr txi itr vtx pt pr icm trgdet cf2 cf1 fb2 fb1 power/battery switch agnd v cc bgnd v bat2 v bat1 i prog nstat rtflt dcout reference aac x20 (itr/308) tip/ring current sense itr itr rft 18 ? rfr 18 ? v bat1 parallel data interface b0 b1 b2 b3 x1 x1 rcvn rcvp current limit and inrush control ring loop rectifier vtx common- mode current detector trip closure ? + 9214a gain = 4 + ? + ? ? + gain ax 9214g gain = 1 ac interface circuit v bat2 v bat1 v bat2 v ref preliminary data sheet october 2001 low-cost ringing slic l9214a/g 8 agere systems inc. pin information 12-3568 (f) figure 2. 28-pin sog diagram figure 3. 32-pin plcc diagram 5 6 7 8 9 10 11 25 24 23 22 21 20 19 dcout i prog cf2 cf1 rtflt i ref agnd b0 b1 b2 b3 fb1 pr pt l9214 4 rcvn 3 rcvp 2 vitr 1 nstat 26 itr 27 vtx 28 txi 12 v cc 13 v bat1 14 v bat2 18 fb2 17 icm 16 trgdet 15 bgnd 28-pin sog 1 430 5 13 21 29 14 20 32 31 32 28 27 26 25 24 23 22 15 16 17 18 19 12 11 10 9 8 7 6 i ref agnd v cc v bat1 v bat2 bgnd trgdet rtflt cf1 cf2 i prog dcout nc nc nc rcvn rcvp vitr nc nstat txi vtx itr icm fb2 fb1 pt pr b3 b2 b1 b0 l9214 32-pin plcc preliminary data sheet october 2001 low-cost ringing slic l9214a/g agere systems inc. 9 pin information (continued) 12-3361f(f) figure 4. 48-pin mlcc diagram 1 3 4 6 7 8 9 10 11 12 2 48 46 45 44 43 42 41 40 38 37 47 13 16 17 18 19 20 21 22 23 24 14 36 33 32 31 30 29 28 27 26 25 35 b3 pt fb1 nc i ref nc pr rcvn nc rcvp nc nc fb2 trgdet nc v bat2 vitr 34 vtx 39 15 5 nc i prog cf2 rtflt agnd nc icm b2 b0 35 l9214a/g 48-pin mlcc dcout cf1 b1 bgnd nc nc nc nc vcc nc nc nc nc nc nc nc itr txi nstat nc v bat1 preliminary data sheet october 2001 low-cost ringing slic l9214a/g 10 agere systems inc. pin information (continued) table 1. pin descriptions 28-pin sog 32-pin plcc 48-pin mlcc symbol type name/function 11 43nstato loop closure detector output?ring trip detector output. when low, this logic output indicates that an off- hook condition exists or ringing is tripped. ?? 5, 14, 18, 28, 32, 39, 42, 44 nc ? no connection. may be used as a tie point. ? 2, 6, 7, 8 1 ? 4, 8, 11, 17, 21, 27, 30, 37, 46 nc ? no connection. may not be used as a tie point. 23 45vitro transmit ac output voltage. output of internal aac amplifier. this output is a voltage that is directly propor- tional to the differential ac tip/ring current. 3 4 47 rcvp i receive ac signal input (noninverting). this high- impedance input controls to ac differential voltage on tip and ring. this node is a floating input. 4 5 48 rcvn i receive ac signal input (inverting). this high-imped- ance input controls to ac differential voltage on tip and ring. this node is a floating input. 5 9 6 dcout o dc output voltage. this output is a voltage that is directly proportional to the absolute value of the differen- tial tip/ring current. this is used to set the dc current limit and the ring trip threshold. 610 7 i prog i current-limit program input. a resistor is connected from this pin to dcout to program the dc current limit for the device. 711 9 cf2 ? filter capacitor. connect a capacitor from this node to ground. 812 10 cf1 ? filter capacitor. connect a capacitor from this node to cf2. 913 12rtflt ? ring trip filter. connect this lead to dcout via a resis- tor and to agnd with a capacitor or a resistor capacitor combination, depending on the ringing type, to filter the ring trip circuit to prevent spurious responses. 10 14 13 i ref i slic internal reference current. connect a resistor between this pin and agnd to generate an internal refer- ence current. 11 15 15 agnd gnd analog signal ground. 12 16 16 v cc pwr analog power supply. user choice of 5 v or 3.3 v nom- inal power supply. 13 17 19 v bat1 pwr battery supply 1. high-voltage battery. 14 18 20 v bat2 pwr battery supply 2. low-voltage battery or power control resistor. 15 19 22 bgnd gnd battery ground. ground return for the battery supplies. preliminary data sheet october 2001 low-cost ringing slic l9214a/g agere systems inc. 11 pin information (continued) table 1. pin descriptions (continued) 28-pin sog 32-pin plcc 48-pin mlcc symbol type name/function 16 20 23 trgdet o tip/ring ground detect. when high, this open collector output indicates the presence of a ring ground or a tip ground. this supervision output may be used in ground key or common-mode fault detection applications. 17 21 24 icm i common-mode current sense. to program tip or ring ground sense threshold, connect a resistor to v cc and connect a capacitor to agnd to filter 50/60 hz. if unused, the pin is connected to ground. 18 22 25 fb2 ? polarity reversal slowdown capacitor. connect a capacitor from this node for controlling rate of battery reversal. also used for ringing, this pin cannot be left open. 19 23 26 fb1 ? polarity reversal slowdown capacitor. connect a capacitor from this node for controlling rate of battery reversal. also used for ringing, this pin cannot be left open. 20 24 29 pt i/o protected tip. the input to the loop sensing circuit and output drive of the tip amplifier. connect to loop through overvoltage and overcurrent protection. 21 25 31 pr i/o protected ring. the input to the loop sensing circuit and output drive of the ring amplifier. connect to loop through overvoltage and overcurrent protection. 22 26 33 b3 i state control input. 23 27 34 b2 i state control input. 24 28 35 b1 i state control input. 25 29 36 b0 i state control input. 26 30 38 itr i transmit gain. input to ax amplifier. connect a resistor from this node to vtx to set transmit gain. gain shaping for termination impedance with a combo i codec is also achieved with a network from this node to vtx. 27 31 40 vtx o ac/dc output voltage. output of internal ax amplifier. the voltage at this pin is directly proportional to the differ- ential tip/ring current. 28 32 41 txi i ac/dc separation. input to internal aac amplifier. con- nect a 0.1 f capacitor from this pin to vtx. preliminary data sheet october 2001 low-cost ringing slic l9214a/g 12 agere systems inc. operating states table 2. control states * in this state, all supervision functions are disabled, on hook transmission is disabled, pin pt is positive with respect to pr , v bat1 is applied to tip/ring, and the tip to ring voltage will be equivalent to the scan state. b3 b2 b1 b0 state 0 0 0 0 disconnect 0 0 0 1 ringing, (line reverse with high slope) 0 0 1 0 unused* 0 0 1 1 ringing, (line forward with high slope) 0 1 0 0 disconnect 0 1 0 1 reverse active and on-hook, fast polarity reversal 0110scan 0 1 1 1 forward active and on-hook, fast polarity reversal 1 0 0 0 disconnect 1 0 0 1 ringing, (line reverse with low slope) 1 0 1 0 unused* 1 0 1 1 ringing, (line forward with low slope) 1 1 0 0 disconnect 1 1 0 1 reverse active and on-hook, slow polarity reversal 1110scan 1 1 1 1 forward active and on-hook, slow polarity reversal state definitions forward active (fast polarity reversal) off-hook pin pt is positive with respect to pr. v bat2 is applied to tip/ring drive amplifiers for the majority of loop lengths. this may also be derived from v bat1 through a power control resistor. loop closure and common-mode detect are active. ring trip detector is turned off to conserve power. overhead is set for undistorted transmission of +3.17 dbm into 600 ? . on-hook pin pt is positive with respect to pr. v bat1 is applied to tip/ring drive amplifiers. the tip to ring on-hook differential voltage will be between ? 42.5 v and ? 56.5 v with a primary battery of ? 65 v. loop closure and common-mode detect are active. ring trip detector is turned off to conserve power. on-hook transmission is enabled. overhead is set to nominal 17.0 v for undistorted transmission of 0 dbm into 600 ? . forward active (slow polarity reversal) off-hook same as the forward active (fast polarity reversal) state, but with slower polarity reversal. on-hook same as the forward active (fast polarity reversal) state, but with slower polarity reversal. preliminary data sheet october 2001 low-cost ringing slic l9214a/g agere systems inc. 13 state definitions (continued) reverse active (fast polarity reversal) off-hook pin pr is positive with respect to pt. v bat2 is applied to tip/ring drive amplifiers via the soft battery switch for the majority of loop lengths. this may also be derived from v bat1 through a power control resistor. loop closure and common-mode detect are active. ring trip detector is turned off to conserve power. overhead is set to nominal 4.0 v for undistorted transmission of 0 dbm into 600 ? and may be increased automatically for larger signal levels. on-hook pin pr is positive with respect to pt. v bat1 is applied to tip/ring drive amplifiers. the tip to ring on-hook differential voltage will be between ? 42.5 v and ? 56.5 v with a primary battery of ? 65 v. loop closure and common-mode detect are active. ring trip detector is turned off to conserve power. on-hook transmission is enabled. overhead is set to nominal 17.0 v for undistorted transmission of 0 dbm into 600 ? . reverse active (slow polarity reversal) off-hook same as the reverse active (fast polarity reversal) state, but with slower polarity reversal. on-hook same as the reverse active (fast polarity reversal) state, but with slower polarity reversal. scan except for loop closure, all circuits (including ring trip and common-mode detector) are powered down. on-hook transmission is disabled. pin pt is positive with respect to pr, and v bat1 is applied to tip/ring. the tip to ring on-hook differential voltage will be between ? 42.5 v and ? 56.5 v with a ? 65 v primary battery. disconnect the tip/ring amplifiers and all supervision are turned off. the slic goes into a high-impedance state. nstat is forced high (on-hook). ring ringing controlled digitally or by a pwm input signal power ring signal is applied to tip and ring. software-selectable slew rate, fast or slow. ring trip supervision and common-mode current supervision are active; loop closure is inactive. overhead voltage is reduced to typically 2.5 v and current limit set at i prog is disabled. current is limited by saturation current of the amplifi- ers themselves, typically 72 ma peak at 125 c. thermal shutdown not controlled via truth table inputs. this mode is caused by excessive heating of the device, such as may be encountered in an extended power-cross situation. preliminary data sheet october 2001 low-cost ringing slic l9214a/g 14 agere systems inc. absolute maximum ratings (at t a = 25 c) stresses in excess of the absolute maximum ratings can cause permanent damage to the device. these are abso- lute stress ratings only. functional operation of the device is not implied at these or any other conditions in excess of those given in the operational sections of the data sheet. exposure to absolute maximum ratings for extended periods can adversely affect device reliability. note: the ic can be damaged unless all ground connections are applied before, and removed after, all other connections. furtherm ore, when powering the device, the user must guarantee that no external potential creates a voltage on any pin of the device that exceeds the device ratings. for example, inductance in a supply lead could resonate with the supply filter capacitor to cause a destructive overvoltage. table 3. typical operating characteristics table 4. thermal characteristics 1. this parameter is not tested in production. it is guaranteed by design and device characterization. 2. airflow, pcb board layers, and other factors can greatly affect this parameter. parameter symbol min typ max unit dc supply (v cc ) ?? 0.5 ? 7.0 v battery supply (v bat1 ) ???? 80 v battery supply (v bat2 ) ??? v bat1 v logic input voltage ?? 0.5 ? v cc + 0.5 v logic output voltage ?? 0.5 ? v cc + 0.5 v operating temperature range ?? 40 ? 125 c storage temperature range ?? 40 ? 150 c relative humidity range ? 5 ? 95 % ground potential difference (bgnd to agnd) ??? 1 v parameter min typ max unit 5 v dc supplies (v cc ) ? 5.0 5.25 v 3 v dc supplies (v cc )2.973.3 ? v high office battery supply (v bat1 ) ? 63 ? 65 ? 70 v auxiliary office battery supply (v bat2 ) ? 15 ? 21 v bat1 v operating temperature range (28-pin sog) 0 25 70 c operating temperature range (32-pin plcc) ? 40 25 85 c parameter min typ max unit thermal protection shutdown (t jc ) 150 165 ? c 28-pin sog thermal resistance junction to ambient ( ja ) 1, 2 : natural convection 2s2p board wind tunnel 200 linear feet per minute (lfpm) 2s2p board ? ? 70 59 ? ? c/w c/w 32-pin plcc thermal resistance junction to ambient ( ja ) 1, 2 : natural convection 2s2p board natural convection 2s0p board wind tunnel 100 linear feet per minute (lfpm) 2s2p board wind tunnel 100 linear feet per minute (lfpm) 2s0p board ? ? ? ? 35.5 50.5 31.5 42.5 ? ? ? ? c/w c/w c/w c/w 48-pin mlcc thermal resistance junction to ambient ( ja ) 1, 2 ? 38 ? c/w preliminary data sheet october 2001 low-cost ringing slic l9214a/g agere systems inc. 15 electrical characteristics table 5. environmental characteristics 1. not to exceed 26 grams of water per kilogram of dry air. table 6. 5.0 v supply currents v bat1 = ? 65 v, v bat2 = ? 21 v, v cc = 5.0 v. table 7. 5.0 v powering v bat1 = ? 65 v, v bat2 = ? 21 v, v cc = 5.0 v. note: refer to the power control description in the applications section to calculate power dissipation in the forward/reverse o ff-hook state. parameter min typ max unit temperature range (28-pin sog) 0 ? 70 c temperature range (32-pin plcc and 48-pin mlcc) ? 40 ? 85 c humidity range 1 5 ? 95 1 %rh parameter min typ max unit supply currents (scan state; no loop current): i vcc i vbat1 i vbat2 ? ? ? 2.90 0.09 0.04 3.80 0.20 0.07 ma ma ma supply currents (forward/reverse active; no loop current, v bat1 applied): i vcc i vbat1 i vbat2 ? ? ? 4.8 1.5 1.0 6.00 1.95 1.20 ma ma ma supply currents (disconnect mode): i vcc i vbat1 i vbat2 ? ? ? 1.60 0.02 0.01 2.20 0.10 0.02 ma ma ma supply currents (ringing mode, no load applied): i vcc i vbat1 i vbat2 ? ? ? 4.40 1.70 0.57 5.0 2.2 0.7 ma ma ma parameter min typ max unit power dissipation (scan state; no loop current) ? 21 33 mw power dissipation (forward/reverse active; no loop current, v bat1 applied) ? 143 182 mw power dissipation (disconnect mode) ? 10 18 mw power dissipation (ring mode; no load applied) ? 144 183 mw preliminary data sheet october 2001 low-cost ringing slic l9214a/g 16 agere systems inc. electrical characteristics (continued) table 8. 3.3 v supply currents v bat1 = ? 65 v, v bat2 = ? 21 v, v cc = 3.3 v. table 9. 3.3 v powering v bat1 = ? 65 v, v bat2 = ? 21 v, v cc = 3.3 v. note: refer to the power control description in the applications section to calculate power dissipation in the forward/reverse o ff-hook state. parameter min typ max unit supply currents (scan state; no loop current): i vcc i vbat1 i vbat2 ? ? ? 2.30 0.09 0.04 3.00 0.18 0.07 ma ma ma supply currents (forward/reverse active; no loop current, v bat1 applied): i vcc i vbat1 i vbat2 ? ? ? 4.40 1.50 0.97 5.30 1.90 1.20 ma ma ma supply currents (disconnect mode): i vcc i vbat1 i vbat2 ? ? ? 1.20 0.02 0.01 1.70 0.10 0.02 ma ma ma supply currents (ringing mode, no load applied): i vcc i vbat1 i vbat2 ? ? ? 4.00 1.64 0.54 4.75 2.16 0.60 ma ma ma parameter min typ max unit power dissipation (scan state; no loop current) ? 14 23 mw power dissipation (forward/reverse active; no loop current, v bat1 applied) ? 132 166 mw power dissipation (disconnect mode) ? 513mw power dissipation (ring mode; no loop current) ? 131 169 mw preliminary data sheet october 2001 low-cost ringing slic l9214a/g agere systems inc. 17 electrical characteristics (continued) table 10. two-wire port * values guaranteed by design, not subject to production test. ? corresponds to 55 db minimum with 1%, 30 ? resistors per q552 (11/96) section 2.1.2 and ieee ? 455. parameter min typ max unit tip or ring drive current = dc + longitudinal + signal currents 72 ?? mapeak tip or ring drive current = ringing + longitudinal 37 ?? mapeak signal current 5 ?? marms longitudinal current capability per wire (longitudinal current is indepen- dent of dc loop current.) 8.5 15 ? marms ringing current (r load = 2330 ? + 24 f) 25 ?? mapeak ringing current (r load = 3500 ? + 1.8 f) 12 ?? mapeak ringing current limit (r load = 100 ? ) ?? 90 mapeak dc loop current ? i lim (r loop = 500 ? ): programming range (v cc = 5.0 v) programming range (v cc = 3.3 v) 15 15 ? ? 45 35 ma ma dc current variation (current limit 15 ma to 45 ma) ?? 10 % dc loop current (r loop = 100 ? , on to off hook transition) t < 20 ms ? ? ? ? 350 100 mapeak ma dc loop current (r loop = 100 ? , on to off hook transition) t < 50 ms ? ? ? ? ? 150% i lim dc feed resistance, 2 x r f (excluding protection resistors) 25 36 50 ? loop resistance range*, (0 db overload into 600 ? ) i loop = 20 ma, v bat2 = ? 24 v, 50 ? (2 x r f ), 60 ? (2 x r p ), 300 ? r loop plus handset i loop = 25 ma, v bat1 = ? 65 v, 50 ? (2 x r f ), 60 ? (2 x r p ), 1000 ? r loop plus handset 840 1540 ? ? ? ? ? ? open loop voltages, |v bat1 | = ? 63 v to ? 70 v: scan/on-hook transmission mode: |pt ? pr| ? differential |pt| or |pr| referenced to bgnd 42.5 ? 48 ? ? 56.5 v v ring mode, |v bat1 | = ? 63 v to ? 70 v: |pt ? pr| ? differential, (open loop ring voltage) 40 ?? vrms loop closure threshold: scan/active/on-hook transmission modes ? 10 ? ma loop closure threshold hysteresis: ? 2 ? ma ground key: differential detector threshold detection 5 50 8 ? 10 ? ma ms longitudinal to metallic balance at pt/pr test method per figure 8, 1 khz ? 58 db minimum, 60 db typical: 300 hz to 600 hz 600 hz to 3.4 khz 55 55 58 58 ? ? db db metallic to longitudinal (harm) balance: 200 hz to 1000 hz 100 hz to 4000 hz 40 40 ? ? ? ? db db psrr 500 hz ? 3000 hz: v bat1 , v bat2 v cc (3.3 v operation) 40 25 ? ? ? ? db db preliminary data sheet october 2001 low-cost ringing slic l9214a/g 18 agere systems inc. electrical characteristics (continued) table 11. analog pin characteristics parameter min typ max unit txi (input impedance) ? 100 ? k ? output offset (vtx) output offset (vitr) output drive current (vtx) output drive current (vitr) output voltage swing (vtx) (v cc = 5.0 v) output voltage swing (vitr) (v cc = 5.0 v) output short-circuit current (vtx) output short-circuit current (vitr) output load resistance (vtx and vitr) output load capacitance (vtx) output load capacitance (vitr) ? ? ? ? 3.7 ? ? ? 10 ? ? 5 70 500 250 ? ? 5 6 ? ? ? ? ? ? ? +5/ ? 8 3.1 ? ? ? 20 50 mv mv a a v v ma ma k ? pf pf rcvn and rcvp: input voltage range (v cc = 5.0 v) input voltage range (v cc = 3.3 v) input bias current 0 0 ? ? ? ? v cc ? 0.5 v cc ? 0.3 1.5 v v a preliminary data sheet october 2001 low-cost ringing slic l9214a/g agere systems inc. 19 electrical characteristics (continued) table 12. ac feed characteristics 1. set externally either by discrete external components or a third- or fourth-generation codec. any complex impedance r1 + r2 | | c between 150 ? and 1400 ? can be synthesized. 2. this parameter is not tested in production. it is guaranteed by design and device characterization. 3. vitr transconductance depends on the resistor from itr to vtx. this gain assumes an ideal 4750 ? , the recommended value. positive cur- rent is defined as the differential current flowing from pt to pr. 4. tested per figure 9. the gain reading is adjusted by the ratio of 696/660 to account for the 36 ? nominal ac feed resistance. parameter min typ max unit ac termination impedance 1 150 600 1400 ? total harmonic distortion (200 hz ? 4 khz) 2 : off-hook on-hook ? ? ? ? 0.3 1.0 % % transmit gain (f = 1004 hz, 1020 hz) 3 : pt/pr current to vitr 291 300 309 v/a receive gain 4 (f = 1004 hz to 1020 hz): rcvp or rcvn to pt ? pr (gain of 8 option, l9214a) rcvp or rcvn to pt ? pr (gain of 2 option, l9214g) 7.6 1.9 8 2 8.4 2.1 ? ? gain vs. frequency (transmit and receive) 2 , 600 ? termination (q.552), 1004 hz, 1020 hz reference: 200 hz ? 300 hz 300 hz ? 3.4 khz 3.4 khz ? 3.6 khz 3.6 khz ? 20 khz 20 khz ? 266 khz ? 0.30 ? 0.05 ? 1.50 ? 3.00 ? 0 0 0 ? 0.1 ? 0.05 0.05 0.05 ? 0.05 ? 2.0 db db db db db gain vs. level (transmit and receive) 2 , 0 dbv reference (q.552): ? 55 db to +3.0 db ? 0.05 0 0.05 db idle-channel noise (tip/ring) 600 ? termination: psophometric c-message 3 khz flat ? ? ? ? 82 8 ? ? 77 13 20 dbmp dbrnc dbrn idle-channel noise (vtx) 600 ? termination: psophometric c-message 3 khz flat ? ? ? ? 82 8 ? ? 77 13 20 dbmp dbrnc dbrn preliminary data sheet october 2001 low-cost ringing slic l9214a/g 20 agere systems inc. electrical characteristics (continued) table 13. logic inputs and outputs (v cc = 5.0 v) table 14. logic inputs and outputs (v cc = 3.3 v) table 15. ringing specifications 1. voltage is measured across both resistive and capacitive elements of the ringer load. 2. voltage is measured only across the resistive element of the ringer load. parameter symbol min typ max unit input voltages: low level high level v il v ih ? 0.5 2.0 0.4 2.4 0.7 v cc v v input current: low level (v cc = 5.25 v, v i = 0.4 v) high level (v cc = 5.25 v, v i = 2.4 v) i il i ih ? ? ? ? 250 250 a a output voltages (open collector with internal pull-up resistor): low level (v cc = 4.75 v, i ol = 200 a) high level (v cc = 4.75 v, i oh = ? 10 a) v ol v oh 0 2.4 0.2 ? 0.4 v cc v v parameter symbol min typ max unit input voltages: low level high level v il v ih ? 0.5 2.0 0.2 2.5 0.5 v cc v v input current: low level (v cc = 3.46 v, v i = 0.4 v) high level (v cc = 3.46 v, v i = 2.4 v) i il i ih ? ? ? ? 250 250 a a output voltages (open collector with internal pull-up resistor): low level (v cc = 3.13 v, i ol = 200 a) high level (v cc = 3.13 v, i oh = ? 5 a) v ol v oh 0 2.2 0.2 ? 0.5 v cc v v parameter min typ max unit ring signal isolation: pt/pr to vitr ring mode ? 60 ? db ringing voltage (5 ren 1386 ? + 40 f load, 200 ? loop, 2 x 30 ? protection resistors, ? 69 v battery, 1.2 crest factor) 1 40 ?? vrms ringing voltage (3 ren 2330 ? + 24 f load, 600 ? loop, 2 x 30 ? protection resistors, ? 69 v battery, 1.2 crest factor) 1 40 ?? vrms ringing voltage (2 ren 3500 ? + 16 f load, 1000 ? loop, 2 x 30 ? protec- tion resistors, ? 69 v battery, 1.2 crest factor) 1 40 ?? vrms ringing voltage (2 ren 3500 ? + 1.8 f load, 500 ? loop, 2 x 30 ? protection resistors, ? 69 v battery, 1.2 crest factor) 2 40 ?? vrms ring signal distortion: 5 ren 1386 ? , 40 f load, 200 ? loop 3 ren 2330 ? , 24 f load, 600 ? loop 2 ren 3500 ? , 16 f load, 1000 ? loop 2 ren 3500 ? , 1.8 f load, 500 ? loop ? ? ? ? 5 5 5 5 ? ? ? 10 % % % % preliminary data sheet october 2001 low-cost ringing slic l9214a/g agere systems inc. 21 electrical characteristics (continued) table 16. ring trip (3 ren configuration) ringing will not be tripped by the following loads: 100 ? resistor in series with a 2 f capacitor applied across tip and ring. ring frequency = 17 hz to 23 hz. 10 k ? resistor in parallel with a 4 f capacitor applied across tip and ring. ring frequency = 17 hz to 23 hz. table 17. ring trip (5 ren configuration) ringing will not be tripped by the following loads: 100 ? resistor in series with a 2 f capacitor applied across tip and ring. ring frequency = 17 hz to 23 hz. 10 k ? resistor in parallel with a 6 f capacitor applied across tip and ring. ring frequency = 17 hz to 23 hz. note: refer to the application section for further description of the 3 ren configuration vs. 5 ren configuration. parameter min typ max unit ring trip (nstat = 0): loop resistance (total) 0 ? 1000 ? ring trip (nstat = 1): loop resistance (total) 10 ?? k ? ringer load ?? 2330 ? + 24 f ? trip time (f = 20 hz) ?? 130 ms parameter min typ max unit ring trip (nstat = 0): loop resistance (total) 0 ? 600 ? ring trip (nstat = 1): loop resistance (total) 10 ?? k ? ringer load ?? 1386 ? + 40 f ? trip time (f = 20 hz) ?? 150 ms preliminary data sheet october 2001 low-cost ringing slic l9214a/g 22 agere systems inc. test configurations 12-3531.j (f) figure 5. basic test circuit, v cc = 3.3 v (3 ren configuration) v bat2 v bat1 bgnd v cc agnd icm trgdet 0.1 f 0.1 f 0.1 f rtflt dcout pr pt 30 ? 30 ? cf1 cf2 b0 b1 b2 b3 0.1 f vitr rcvp rcvn itr vtx txi v bat2 v bat1 v cc r loop 100 ?/ 600 ? tip ring fb2 fb1 0.47 f l9214 nstat b0 b1 b2 b3 4750 ? 0.1 f 600 k ? 0.1 f v cc i prog i ref 28.7 k ? 5.76 k ? 75 k ? 133 k ? 1 f 0.047 f 0.047 f rcvp rcvn vitr preliminary data sheet october 2001 low-cost ringing slic l9214a/g agere systems inc. 23 test configurations (continued) 12-2582.c (f) figure 6. metallic psrr 12-2583.b (f) figure 7. longitudinal psrr 12-2584.d (f) figure 8. longitudinal balance 12-2587.j (f) figure 9. ac gains v s 4.7 f 100 ? v bat or v cc disconnect v t/r v bat or v cc tip ring basic test circuit + ? psrr = 20log v s v t/r 600 ? bypass capacitor v s 4.7 f 100 ? v bat or v cc disconnect bypass capacitor 56.3 ? v bat or v cc tip ring basic test circuit psrr = 20log v s v m 67.5 ? 10 f 10 f 67.5 ? v m + ? tip ring basic test circuit longitudinal balance = 20log v s vitr 368 ? 100 f 100 f 368 ? v s vitr pt pr basic test circuit 600 ? v t/r + ? rcvn v s vitr rcvn or rcvp or rcvp g xmt v xmt v tr ? ------------ - = g rcv v tr ? v rcvp or v rcvn ------------------------------------------------- = preliminary data sheet october 2001 low-cost ringing slic l9214a/g 24 agere systems inc. applications power control under normal device operating conditions, power dissi- pation must be controlled to prevent the device temper- ature from rising too close to the thermal shutdown point. power dissipation is highest with higher battery voltages, higher current limit, and under shorter dc loop conditions. additionally, higher ambient temperature will reduce thermal margin. increasing the number of pc board layers and increasing airflow around the device are typical ways of improving thermal margin. the maximum recommended junction temperature for the l9214 is 150 c. the junction temperature is: tj = t ambient + ja * p slic the thermal impedance of this device depends on the package type as well as number of pcb layers and air- flow. the thermal impedance of the 28-pin sog pack- age is somewhat higher than the 32-pin plcc package. the 28-pin sog package in still air with a single-sided pcb is rated at 70 c/w. the 32-pin plcc package thermal impedance with no airflow on a four-layer pcb is estimated at 37 c/w. the power handling capability of the package is: p slic = (150 c ? t ambient )/ ja which is a minimum of 0.93 w for the 28-pin sog package with a single-sided pcb and no airflow and as much as 2.15 w for the 32-pin plcc package with a multilayer pcb. this device is intended to operate with a high-voltage primary battery of ? 63 v to ? 70 v. under short-loop conditions, an internal soft battery switch shunts most (all but i bias = 3.5 ma) of the loop current to an auxiliary battery of lower absolute voltage (typically ? 21 v). where single battery operation is required, an external power control resistor can be connected from the v bat2 pin to v bat1 and all but 3.5 ma of the loop current will flow through the power control resistor. the power dissipated in the device is best illustrated by an example. assume v bat1 is ? 65 v, v bat2 is ? 21 v, and the current limit is is i loop . let i q1 and i q2 be the quiescent currents drawn from v bat1 and v bat2 respectively (the current drawn from the battery when the phone is on-hook). let i bias be the additional current drawn from v bat1 when the phone is off-hook. i bias = i vbat1(off-hook) ? i q1 typically i bias is 3.5 ma. this additional v bat1 current contributes to the loop current and the remaining loop current is supplied by v bat2 , so that i vbat2 = i q2 + i loop ? i bias i vcc is the current drawn from v cc and is relatively con- stant as the phone goes off hook. the total power from the power supplies is: p total = {[(i q1 + i bias ) * v bat1 ] + [(i q2 + i loop ? i bias ) * v bat2 ] + [(i vcc ) * v cc ]} the maximum values of i q1 and i q2 are 1.95 ma and 1.20 ma respectively from table 4. if the current limit is set to 25 ma, given the current limit tolerance of 10%, the maximum current limit is 27.5 ma. also, assume 20 ? of wire resistance, 30 ? of protection resistance, and 200 ? for the handset p total = {[(1.95 ma + 3.5 ma) * (65 v)] + [(1.20 ma + 27.5 ma ? 3.5 ma) * (21 v)] + [(6 ma) * (5 v)] = 913.45 mw the power delivered to the loop and the protection resistors (p loop ) is: p loop = {(i loop ) 2 * [(2 * r protection ) + (r wire ) + (r phone )]} = {(27.5 ma) 2 * [(2 * 30 ? ) + (20 ? ) + 200 ? )]} = 212 mw thus, the total power dissipated by the slic is: p d of slic = total power (p total ) ? power delivered to loop and protection resistors (p loop ). p d = 913.45 mw ? 212 mw = 701.45 mw for this example. since the minimum power handling capability of the 28-pin sog package is 0.93 w, in this case either package type is acceptable even with a single-sided pcb. at higher battery voltages, higher ambient tem- perature, and higher current limit, the required thermal impedance drops and the 32-pin plcc package, more pcb layers, or some airflow might be required. another case to consider is the case of the power con- trol resistor. in this case, the effective v bat2 voltage is: v bat2 = v bat1 ? r pwr * (i loop ? i bias + i q2 ) for the case of the 27.5 ma maximum current limit, choosing r pwr = 1.75 k ? would give v bat2 = ? 21 v and the same slic power as above. the power in the resistor would be: p rpwr = (i loop ? i bias + i q2 ) 2 * r pwr = 1.11 w choosing a larger r pwr would result in lower v bat2 and lower slic power, but more power in the resistor. simi- larly, choosing a smaller r pwr results in higher v bat2 , higher slic power, and less power in the resistor. preliminary data sheet october 2001 low-cost ringing slic l9214a/g agere systems inc. 25 applications (continued) dc loop current limit in the active modes, dc current limit is programmable via an external resistor. the resistor is connected between i prog and dcout. the loop current limit (i loop ) with 100 ? load is related to the r iprog pro- gramming resistor by: i loop (ma) = 4 ma/k ? * r iprog (k ? ) + 2 ma note that the overall current-limit accuracy achieved will be affected by the specified accuracy of the internal slic current-limit circuit and the accuracy of the exter- nal resistor. the above equation describes the active mode steady- state current-limit response. there will be a transient response of the current-limit circuit upon an on- to off- hook transition. typical active mode transient current- limit response is given in table 18. table 18. typical active mode on- to off-hook tip/ ring current-limit transient response overhead voltage active mode the overhead is preprogrammed in the active mode. note that overhead is not symmetrical with respect to tip and ring. under default conditions, the tip to ground voltage is 2.1 v to 2.6 v and the ring to battery over- head is 14.5 v typical. the default overhead provides sufficient headroom for on-hook transmission of a +3.17 dbm signal into 600 ? . +3.17 dbm = 10 log (vrms 2 / p 0 * r 600 ? ) dbm = 10 log (vrms 2 / 0.001 w * 600 ? ) +3.17 dbm = 10 log vrms = 1.12 v and vpeak = 1.58 v are supported. scan mode if the magnitude of the primary battery is greater than a nominal ? 63 v, the magnitude of the open-loop tip to ring voltage is clamped to between ? 42.5 v and ? 56.5 v. again, the overhead is not symmetrical with respect to tip and ring. with the magnitude of the primary battery greater than a nominal ? 63 v, the tip to ground voltage is clamped between ? 0.1 v and ? 0.6 v and the ring to ground voltage is clamped between ? 42.5 v and ? 56.5 v. if the magnitude of the primary battery is less than a nominal ? 63 v, the tip to ground voltage is ? 0.1 v to ? 0.6 v and the ring to battery voltage is typi- cally 17 v less than v bat1 . on-hook transmission mode if the magnitude of the primary battery is greater than 63 v, the magnitude of the open-loop tip to ring voltage will be greater than 42.5 v. if the magnitude of the pri- mary battery is less than 63 v, the open-loop voltage may be less than 42.5 v and is approximately 17 v less than the magnitude of the primary battery voltage. for primary battery voltages less than 70 v, the magnitude of the ring to ground voltage will be less than 56.5 v. again, the overhead is not symmetrical with respect to tip and ring. the tip voltage to ground is between ? 2 v and ? 4.5 v and the ring to primary voltage is 14.5 v typical. parameter value unit dc loop current: active mode r loop = 100 ? on- to off-hook transition t < 20 ms i loop + 60 ma dc loop current: active mode r loop = 100 ? on- to off-hook transition t < 30 ms i loop + 20 ma dc loop current: active mode r loop = 100 ? on- to off-hook transition t < 50 ms i loop ma vrms 2 0.6 iv r () ------------------------------- - preliminary data sheet october 2001 low-cost ringing slic l9214a/g 26 agere systems inc. applications (continued) overhead voltage (continued) ring mode in the ring mode, to maximize ringing loop length, the overhead is decreased to the saturation of the tip ring drive amplifiers, a nominal 4 v. the tip to ground volt- age is 1 v, and the ring to v bat1 voltage is 3 v. the ax amplifier at vtx is active during the ring mode, differential ring current may be sensed at vtx during the ring mode. loop range the dc loop range for medium-loop applications is cal- culated using: the dc loop range for short-loop applications is calcu- lated using: where: v ohh = 19.5 (2.5 v + 17 v) and v ohl = 3.4 v (2.5 v + 0.9 v) and where: r l = loop resistance, not including protection resistors. r p = protection resistor value. rdc = slic internal dc feed resistance. |v bat1 | and |v bat2 | = battery voltage magnitude. i loop = loop current. v ohh = overhead voltage when power is drawn from v bat1 . v ohl = overhead voltage when power is drawn from v bat2 . the point of change over between v bat2 and v bat1 occurs at: |v bat2 | ? (0.9 + 2.5) v > [(2r p + r dc + r l ) * i loop ] v v bat2 is typically applied under off-hook conditions for power conservation and slic thermal considerations. the l9214 is intended for short- and medium-loop applications and, therefore, will always be in current limit during off-hook conditions. however, note that the ringing loop length rather than the dc loop length will be the factor to determine operating loop length. where v bat2 is insufficient to support the loop length, the power will be taken from v bat1 . battery reversal rate the rate of battery reverse is controlled or ramped by capacitors fb1 and fb2. a chart showing fb1/fb2 val- ues versus typical ramp time is given below. leave fb1 and fb2 open if it is not desired to ramp the rate of battery reversal. table 19. fb1/fb2 values vs. typical ramp time at v bat1 = ? 65 v r l v bat1 v ohh ? () i loop ---------------------------------------------- - 2r p ? r dc ? = r l v bat2 v ohl ? () i loop ---------------------------------------------- 2r p ? r dc ? = c fb1 /c fb2 transition time fast, b3 = 0 transition time slow, b3 = 1 0.01 f 7 ms 20 ms 0.1 f 75 ms 220 ms 0.22 f 145 ms 440 ms 0.47 f 300 ms 900 ms 1.0 f 600 ms 1.8 s 1.22 f 750 ms 2.25 s 1.3 f 830 ms 2.5 s 1.4 f 900 ms 2.7 s 1.6 f 1070 ms 3.2 s preliminary data sheet october 2001 low-cost ringing slic l9214a/g agere systems inc. 27 supervision the l9214 offers the loop closure and ring trip supervi- sion functions. internal to the device, the outputs of these detectors are multiplexed into a single package output, nstat. additionally, a common-mode current detector for tip or ring ground detection is included for ground key applications. loop closure the loop closure has a fixed typical 10 ma on- to off- hook threshold in the active mode and a fixed 10 ma on- to off-hook threshold from the scan mode. in either case, there is a 2 ma hysteresis with v cc = 5.0 v and with v cc = 3.3 v. ring trip the ring trip detector requires an external filter at the input, minimizing external components. an r + r//c combination of 75 k ? and 133 k ? // 1 f, for a filter pole at 3.3 hz, is recommended for a 3 ren config- uration. for a 5 ren configuration, a 150 k ? and 100 k ? // 1 f (for a filter pole at 2.65 hz) combination is recommended. the ring trip threshold is internally fixed and is indepen- dent of battery voltage. the threshold, i rt = 20.1 ma. tip or ring ground detector in the ground key or ground start applications a com- mon-mode current detector is used to indicate either a tip- or ring-ground has occurred (ground key) or an off- hook has occurred (ground start). the detection thresh- old is set by connecting a resistor from icm to v cc . 1000 * v cc /r icm (k ? ) = i th (ma) where: r icm > 80 k ? @ v cc = 3.3 v r icm > 150 k ? @ v cc = 5.0 v additionally, a filter capacitor across r icm will set the time constant of the detector. no hysteresis is associ- ated with this detector. power ring the device offers a ring mode, in which a power ring signal is provided to the tip/ring pair. the standard method of ringing is to perform trapezoidal ringing by use of the state input pins. it is possible to select either fast or slow slew rates to alter the crest factor of the ringing signal. this allows designers to set the external capacitors to a specific factor and change the ringing frequency under software control while maintaining the crest factor between 1.2 and 1.6 for the trapezoidal sig- nal. during the ring mode, it is also possible to supply a pulse-width modulated, pwm, signal into the device ? s b1 input. this signal is used to produce the power ring signal. this signal must be removed during nonring mode states. the user may input any crest factor ring signal using this method; thus, the device will support a sine wave (crest factor 1.414) or a lower or higher crest factor input for increased power efficiency ring signal. various crest factors are shown below. 12-3346a (f) note: slew rate = 5.65 v/ms; trise = tfall = 23 ms; pwidth = 2 ms; period = 50 ms. figure 10. ringing waveform crest factor = 1.6 12-3347a (f) note: slew rate = 10.83 v/ms; trise = tfall = 12 ms; pwidth = 13 ms; period = 50 ms. figure 11. ringing waveform crest factor = 1.2 time (s) ? 80 ? 60 ? 40 ? 20 0 20 40 60 80 0.00 0.02 0.06 0.04 0.08 0.10 0.12 0.14 0.16 0.18 0.20 volts (v) time (s) ? 80 ? 60 ? 40 ? 20 0 20 40 60 80 0.00 0.02 0.06 0.04 0.08 0.10 0.12 0.14 0.16 0.18 0.20 volts (v) preliminary data sheet october 2001 low-cost ringing slic l9214a/g 28 agere systems inc. supervision (continued) power ring (continued) the ring signal will appear balanced on tip and ring. that is, the ring signal is applied on both tip and ring, with the signal on tip 180 out of phase from the signal on ring. this operation is shown in figure 12 below. ringing loop range is calculated as follows: v ringload = {(v battery ? 4)/crest factor} * {r load /(r load + r loop + 2 x r protection )} as a practical example, calculate the maximum dc loop length, assuming the following conditions: minimum required ring voltage = 40 vrms v battery = ? 67 v trapezoidal ringing, crest factor = 1.2 protection resistors = 30 ? each ring load = 2 north american ren = 3500 ? + 16 f ringing frequency = 25 hz first, calculate the equivalent ringing load resistance at 25 hz. r load = {(3500 ? ) 2 + (2 * * 25 * 16e ? 6) ? 2 } 0.5 r load = 3522 ? 40 vrms = {(67 ? 4)/1.2)} {3522 ? /(r loop + 3522 ? + 60 ? )} r loop = 1040 ? effects such as power supply tolerance and crest factor tolerance can affect this calculation. crest factor is estimated by the formula: where: f = ringing frequency; c fb = (c fb1 + c fb2 )/2; ics = 30 a with b3 = 1 and 90 a with b3 = 0; v ohh = 4 v 1 1 4fc fb v bat1 v ohh ? ??) ( 3i cs ----------------------------------------------------------------------------------------- ? ------------------------------------------------------------------------------------------------------- = 12-3532.b (f) figure 12. ring operation gnd v bat ring load 1/2 r loop + r protection 1/2 r loop + r protection pt +1 pr b1 square wave or pwm signal l9214 v tip v ring ? 1 3 v 1 v preliminary data sheet october 2001 low-cost ringing slic l9214a/g agere systems inc. 29 periodic pulse metering (ppm) periodic pulse metering (ppm), also referred to as tele- tax (ttx), is applied to the audio input of the l9214. when in the active state, this signal is presented to the tip/ring subscriber loop along with the audio signal. the l9214 assumes that a shaped ppm signal is applied to the audio input. ac applications ac parameters there are four key ac design parameters. termination impedance is the impedance looking into the 2-wire port of the line card. it is set to match the impedance of the telephone loop in order to minimize echo return to the telephone set. transmit gain is measured from the 2-wire port to the pcm highway, while receive gain is done from the pcm highway to the transmit port. transmit and receive gains may be specified in terms of an actual gain, or in terms of a transmission level point (tlp), that is the actual ac transmission level in dbm. finally, the hybrid balance network cancels the unwanted amount of the receive signal that appears at the transmit port. codec types at this point in the design, the codec needs to be selected. the interface network between the slic and codec can then be designed. below is a brief codec feature summary. first-generation codecs these perform the basic filtering, a/d (transmit), d/a (receive), and -law/a-law companding. they all have an op amp in front of the a/d converter for transmit gain setting and hybrid balance (cancellation at the summing node). depending on the type, some have differential analog input and output stages, +5 v only or 5 v operation, and -law/a-law selectability. these are available in single and quad designs. this type of codec requires continuous time analog filtering via external resistor/capacitor networks to set the ac design parameters. an example of this type of codec is the agere t7504 quad 5 v only codec. this type of codec tends to be the most economical in terms of piece part price, but tends to require more external components than a third-generation codec. the ac parameters are fixed by the external r/c net- work so software control of ac parameters is difficult. third-generation codecs this class of devices includes all ac parameters set digitally under microprocessor control. depending on the device, it may or may not have data control latches. additional functionality sometimes offered includes tone plant generation and reception, ppm generation, test algorithms, and echo cancellation. again, this type of codec may be 3.3 v, 5 v only, or 5 v operation, sin- gle-, quad-, or 16-channel, and -law/a-law or 16-bit linear coding selectable. examples of this type of codec are the agere t8535/6 (5 v only, quad, standard features), t8537/8 (3.3 v only, quad, standard fea- tures), t8533/4 (5 v only, quad with echo cancellation), and the t8531/32 (5 v only, eight- or 16-channel). ac interface network the ac interface network between the l9214 and the codec will vary depending on the codec selected. with a first-generation codec, the interface between the l9214 and codec actually sets the ac parameters. with a third-generation codec, all ac parameters are set dig- itally, internal to the codec; thus, the interface between the l9214 and this type of codec is designed to avoid overload at the codec input in the transmit direction and to optimize signal to noise ratio (s/n) in the receive direction. because the design requirements are very different with a first- or third-generation codec, the l9214 is offered with two different receive gains. each receive gain was chosen to optimize, in terms of external com- ponents required, the ac interface between the l9214 and codec. with a first-generation codec, the termination imped- ance is set by providing gain shaping through a feed- back network from the slic vitr output to the slic rcvn/rcvp inputs. the l9214 provides a transcon- ductance from t/r to vitr in the transmit direction and a single-ended to differential gain from either rcvn or rcvp to t/r in the receive direction. assuming a short from vitr to rcvn or rcvp, the maximum imped- ance that is seen looking into the slic is the product of the slic transconductance times the slic receive gain, plus the protection resistors. the various speci- fied termination impedance can range over the voice- band as low as 300 ? up to over 1000 ? . thus, if the slic gains are too low, it will be impossible to synthe- size the higher termination impedances. further, the termination that is achieved will be far less than what is calculated by assuming a short for slic output to slic input. preliminary data sheet october 2001 low-cost ringing slic l9214a/g 30 agere systems inc. ac applications (continued) ac interface network (continued) in the receive direction, in order to control echo, the gain is typically a loss, which requires a loss network at the slic rcvn/rcvp inputs, which will reduce the amount of gain that is available for termination imped- ance. for this reason, a high-gain slic is required with a first-generation codec. with a third-generation codec, the line card designer has different concerns. to design the ac interface, the designer must first decide upon all termination imped- ance, hybrid balances, and transmission level point (tlp) requirements that the line card must meet. in the transmit direction, the only concern is that the slic does not provide a signal that is too hot and overloads the codec input. thus, for the highest tlp that is being designed to, given the slic gain, the designer, as a function of voiceband frequency, must ensure the codec is not overloaded. with a given tlp and a given slic gain, if the signal will cause a codec overload, the designer must insert some sort of loss, typically a resis- tor divider, between the slic output and codec input. note also that some third-generation codecs require the designer to provide an inherent resistive termina- tion via external networks. the codec will then provide gain shaping, as a function of frequency, to meet the return loss requirements. this feedback will increase the signal at the codec input and increase the likeli- hood that a resistor divider is needed in the transmit direction. further stability issues may add external components or excessive ground plane requirements to the design. in the receive direction, the issue is to optimize the s/n. again, the designer must consider all the tlps. the idea is, for all desired tlps, to run the codec at or as close as possible to its maximum output signal, to optimize the s/n. remember noise floor is constant, so the hotter the signal from the codec, the better the s/n. the problem is if the codec is feeding a high-gain slic, either an external resistor divider is needed to knock the gain down to meet the tlp requirements, or the codec is not operated near maximum signal levels, thus compromising the s/n. thus, it appears that the solution is to have a slic with a low gain, especially in the receive direction. this will allow the codec to operate near its maximum output signal (to optimize s/n), without an external resistor divider (to minimize cost). to meet the unique requirements of both type of codecs, the l9214 offers two receive gain choices. these receive gains are mask programmable at the factory and are offered as two different code variations. for interface with a first-generation codec, the l9214 is offered with a receive gain of 8. for interface with a third-generation codec, the l9214 is offered with a receive gain of 2. in either case, the transconductance in the transmit direction or the transmit gain is 300 ? , (300 v/a). this selection of receive gain gives the designer the flexibility to maximize performance and minimize exter- nal components, regardless of the type of codec cho- sen. design examples first-generation codec ac interface network ? resistive termination the following reference circuit shows the complete slic schematic for interface to the agere t7504 first- generation codec for a resistive termination imped- ance. for this example, the ac interface was designed for a 600 ? resistive termination and hybrid balance with transmit gain and receive gain set to 0 dbm. for illustration purposes, no ppm injection was assumed in this example. this is a lower feature application example and uses single battery operation, fixed overhead, current limit, and loop closure threshold. resistor r gn is optional. it compensates for any mis- match of input bias voltage at the rcvn/rcvp inputs. if it is not used, there may be a slight offset at tip and ring due to mismatch of input bias voltage at the rcvn/rcvp inputs. it is very common to simply tie rcvn directly to ground in this particular mode of oper- ation. if used, to calculate rgn, the impedance from rcvn to ac ground should equal the impedance from rcvp to ac ground. preliminary data sheet october 2001 low-cost ringing slic l9214a/g agere systems inc. 31 ac applications (continued) design examples (continued) example 1, real termination the following design equations refer to the circuit in figure 13. use these to synthesize real termination impedance. termination impedance: z t = receive gain: v t/r i t/r ? ------------ z t 36 ? 2 + r p 2400 1 r t1 r gp -------- - r t1 r rcv ----------- - ++ ----------------------------------- + = g rcv v t/r v fr ----------- - = g rcv 8 1 r rcv r t1 ----------- r rcv r gp ----------- - ++ ?? ?? 1 z t z t/r -------- - + ?? ?? ------------------------------------------------------------------ = transmit gain: hybrid balance: h bal = 20log h bal = 20log to optimize the hybrid balance, the sum of the currents at the vfx input of the codec op amp should be set to 0. the expression for zhb becomes the following: g tx v gsx v t/r ---------- - = g tx r x ? r t2 --------- 300 z t/r -------- - = r x r hb ----------- - g tx ? g rcv ?? ?? v gsx v fr -------------- - ?? ?? r hb k ? () r x g tx g rcv ------------------- = 12-3569 (f) figure 13. ac equivalent circuit r p z t + ? r p v t/r i t/r v s z t/r + ? ring a v = ? 1 a v = 1 vitr current sense tip + ? r t1 r rcv r hb1 r t2 rcvn rcvp r x vgsx vf x in v fr 1/4 t7504 codec r gp +2.4 v ? 0.300 v/ma a v = 4 l9214 vf x ip 18 ? 18 ? + ? + ? preliminary data sheet october 2001 low-cost ringing slic l9214a/g 32 agere systems inc. ac applications (continued) design examples (continued) example 1, real termination (continued) 12-3533.l (f) figure 14. agere t7504 first-generation codec; resistive termination (5 ren configuration) v bat1 bgnd v bat2 v cc agnd icm trgdet ground key not used c vbat1 0.1 f c vbat2 0.1 f c cc 0.1 f pr pt agere l7591 v bat1 fusible resistor 30 ? 30 ? cf1 cf2 fb1 fb2 nstat b3 b2 b1 b0 c f1 0.22 f c f2 0.1 f vitr rcvp rcvn itr vtx txi r gx 4750 ? v bat1 v bat2 v cc c tx 0.1 f 1/4 t7504 codec r t6 c c1 r x gsx +2.4 v r hb1 vf x in r rcv r t3 r gp c c2 vf r o dx dr fse fsep mclk asel control inputs sync and pcm highway clock r gn ? + 49.9 k ? 100 k ? 100 k ? 60.4 k ? 0.1 f 17.65 k ? 26.7 k ? 69.8 k ? 0.1 f l9214a fusible resistor or ptc or ptc rtflt dcout i prog (i loop = 25 ma) i ref r rt2 r rt1 100 k ? c rt 1 f 150 k ? r iprog 5.76 k ? r iref 28.7 k ? c fb1 0.01 f c fb2 0.01 f from/to control r cr 5 k ? c cc1 150 nf d bat1 preliminary data sheet october 2001 low-cost ringing slic l9214a/g agere systems inc. 33 ac applications (continued) design examples (continued) example 1, real termination (continued) table 20. l9214 parts list for agere t7504 first-generation codec; resistive termination note: t x = 0 dbm, r x = 0 dbm, termination impedance = 600 ?, hybrid balance = 600 ?. name value tolerance rating function fault protection r pt 30 ? 1% fusible or ptc protection resistor. r pr 30 ? 1% fusible or ptc protection resistor. protector agere l7591 ? ? secondary protection. power supply c vbat1 0.1 f 20% 100 v v bat filter capacitor. c vbat2 0.1 f 20% 50 v v bat filter capacitor. |v bat2 | < |v bat1 |. d bat1 1n4004 ? ? reverse current. c cc 0.1 f 20% 10 v v cc filter capacitor. c f1 0.22 f 20% 100 v filter capacitor. c f2 0.1 f 20% 100 v filter capacitor. dc profile r iprog 5.76 k ? 1% 1/16 w with r iref , fixes dc current limit. r iref 28.7 k ? 1% 1/16 w with r iprog , fixes dc current limit. ringing/ring trip c rt 1.0 f 20% 10 v ring trip filter capacitor. r rt1 100 k ? 1% 1/16 w ring trip filter resistor. r rt2 150 k ? 1% 1/16 w ring trip filter resistor. c fb1 0.01 f 20% 100 v with c fb2 , slows rate of battery reversal. sets crest factor of balanced power ring signal. c fb2 0.01 f 20% 100 v with c fb1 , slows rate of battery reversal. sets crest factor of balanced power ring signal. ac interface r gx 4750 ? 1% 1/16 w sets t/r to vitr transconductance. r cr 5 k ? 5% 1/16 w compensation resistor. c cc1 150 pf 20% 10 v compensation capacitor. c tx 0.1 f 20% 10 v ac/dc separation. c c1 0.1 f 20% 10 v dc blocking capacitor. c c2 0.1 f 20% 10 v dc blocking capacitor. r t3 69.8 k ? 1% 1/16 w with r gp and r rcv , sets termination impedance and receive gain. r t6 49.9 k ? 1% 1/16 w with r x , sets transmit gain. r x 100 k ? 1% 1/16 w with r t6 , sets transmit gain. r hb1 100 k ? 1% 1/16 w with r x , sets hybrid balance. r rcv 60.4 k ? 1% 1/16 w with r gp and r t3 , sets termination impedance and receive gain. r gp 26.7 k ? 1% 1/16 w with r rcv and r t3 , sets termination impedance and receive gain. r gn optional 17.6 k ? 1% 1/16 w optional. compensates for input offset at rcvn/rcvp. preliminary data sheet october 2001 low-cost ringing slic l9214a/g 34 agere systems inc. ac applications (continued) design examples (continued) first-generation codec ac interface network ? complex termination the following reference circuit shows the complete slic schematic for interface to the agere t7504 first- generation codec for the german complex termination impedance. for this example, the ac interface was designed for a 220 ? + (820 ? || 115 nf) complex ter- mination and hybrid balance with transmit gain and receive gain set to 0 dbm. complex termination impedance design example the gain shaping necessary for a complex termination impedance may be done by shaping across the ax amplifier at nodes itr and vtx. complex termination is specified in the form: 5-6396(f) to work with this application, convert termination to the form: 5-6398(f) where: r 1 = r 1 + r 2 r 2 = (r 1 + r 2 ) c = c ac interface using first-generation codec r gx /r tgs /c gs (z tg ): these components give gain shaping to get good gain flatness. these components are a scaled version of the specified complex termina- tion impedance. note for pure (600 ? ) resistive terminations, compo- nents r tgs and c gs are not used. resistor r gx is used and is still 4750 ? . r x /r t6 : with other components set, the transmit gain (for complex and resistive terminations) r x and r t6 are varied to give specified transmit gain. r t3 /r rcv /r gp : for both complex and resistive termina- tions, the ratio of these resistors sets the receive gain. for resistive terminations, the ratio of these resistors sets the return loss characteristic. for complex termi- nations, the ratio of these resistors sets the low-fre- quency return loss characteristic. c n /r n1 /r n2 : for complex terminations, these compo- nents provide high-frequency compensation to the return loss characteristic. for resistive terminations, these components are not used and rcvn is connected to ground via a resistor. r hb : sets hybrid balance for all terminations. set z tg ? gain shaping: z tg = r gx || r tgs + c gs which is a scaled version of z t/r (the specified termination resistance) in the r 1 || r 2 + c form. r gx must be 4750 ? to set slic transconductance to 300 v/a. r gx = 4750 ? at dc, c gs and c are open. r gx = m x r 1 where m is the scale factor. m = it can be shown: r tgs = m x r 2 and c tgs = r 2 c r 1 r 1 c r 2 r 1 r 2 ------- r 2 r 1 r 2 + --------------------- ?? ?? 2 4750 r 1 -------------- c m ------ preliminary data sheet october 2001 low-cost ringing slic l9214a/g agere systems inc. 35 ac applications (continued) design examples (continued) ac interface using first-generation codec (continued) 5-6400.h (f) figure 15. interface circuit using first-generation codec (blocking capacitors not shown) 0.1 f r tgs v tx r gx = 4750 ? t xi v itr r t6 r x r t3 r hb codec output drive amp codec op amp ? + 20 c n r n1 r n2 r gp r rcv ? i t/r 318.25 c gs rcvn rcvp transmit gain transmit gain will be specified as a gain from t/r to pcm, t x (db). since pcm is referenced to 600 ? and assumed to be 0 db, and in the case of t/r being refer- enced to some complex impedance other than 600 ? resistive, the effects of the impedance transformation must be taken into account. again, specified complex termination impedance at t/r is of the form: 5-6396(f) first, calculate the equivalent resistance of this network at the midband frequency of 1000 hz. r eq = using r eq , calculate the desired transmit gain, taking into account the impedance transformation: t x (db) = t x (specified[db]) + 20log t x (specified[db]) is the specified transmit gain. 600 ? is the impedance at the pcm, and r eq is the impedance at tip and ring. 20log represents the power loss/gain due to the impedance transformation. note in the case of a 600 ? pure resistive termination at t/r 20log = 20log = 0. thus, there is no power loss/gain due to impedance transformation and t x (db) = t x (specified[db]) . finally, convert t x (db) to a ratio, g tx : t x (db) = 20log g tx the ratio of r x /r t6 is used to set the transmit gain: = g tx with a quad agere codec such as t7504: r x < 200 k ? r 2 c r 1 2 f () 2 c 1 2 r 1 r 2 2 r 1 r 2 ++ 12 f () 2 r 2 2 c 1 2 + ----------------------------------------------------------------------------- ?? ?? 2 2 f r 2 2 c 1 2 12 f () 2 r 2 2 c 1 2 + -------------------------------------------------- - ?? ?? 2 + 600 r eq ---------- - 600 r eq ---------- - 600 r eq ---------- - 600 600 --------- - r x r t6 ---------- 318.25 20 ----------------- - 1 m ---- - preliminary data sheet october 2001 low-cost ringing slic l9214a/g 36 agere systems inc. ac applications (continued) design examples (continued) ac interface using first-generation codec (contin- ued) receive gain ratios of r rcv , r t3 , r gp will set both the low-frequency termination and receive gain for the complex case. in the complex case, additional high-frequency compen- sation, via c n , r n1 , and r n2 , is needed for the return loss characteristic. for resistive termination, c n , r n1 , and r n2 are not used and rcvn is tied to ground via a resistor. determine the receive gain, g rcv , taking into account the impedance transformation in a manner similar to trans- mit gain. r x (db) = r x (specified[db]) + 20log r x (db) = 20log g rcv then: g rcv = and low-frequency termination z ter(low) = + 2r p + 36 ? z ter(low) is the specified termination impedance assum- ing low frequency (c or c is open). r p is the series protection resistor. 36 ? is the typical internal feed resistance. these two equations are best solved using a computer spreadsheet. next, solve for the high-frequency return loss compen- sation circuit, c n , r n1 , and r n2 : c n r n2 = c g r tgp r n1 = r n2 there is an input offset voltage associated with nodes rcvn and rcvp. to minimize the effect of mismatch of this voltage at t/r, the equivalent resistance to ac ground at rcvn should be approximately equal to that at rcvp. refer to figure 16 (with dc blocking capaci- tors). to meet this requirement, r n2 = r gp || r t3 . hybrid balance set the hybrid cancellation via r hb . r hb = if a 5 v only codec such as the agere t7504 is used, dc blocking capacitors must be added as shown in fig- ure 16. this is because the codec is referenced to 2.5 v and the slic to ground ? with the ac coupling, a dc bias at t/r is eliminated and power associated with this bias is not consumed. typically, values of 0.1 f to 0.47 f capacitors are used for dc blocking. the addition of blocking capaci- tors will cause a shift in the return loss and hybrid bal- ance frequency response toward higher frequencies, degrading the lower-frequency response. the lower the value of the blocking capacitor, the more pro- nounced the effect is, but the cost of the capacitor is lower. it may be necessary to scale resistor values higher to compensate for the low-frequency response. this effect is best evaluated via simulation. a pspice ? model for the l9214 is available. design equation calculations seldom yield standard component values. conversion from the calculated value to standard value may have an effect on the ac parameters. this effect should be evaluated and opti- mized via simulation. r eq 600 ---------- - 4 1 r rcv r t3 --------------- r rcv r gp --------------- ++ ----------------------------------------------- - 2400 1 r t3 r gp ----------- - r t3 r rcv --------------- ++ -------------------------------------------- 2r p 2400 ------------ - 2400 2r p ------------ - r tgs r tgp ------------- - ?? ?? 1 ? r x g rcv g tx ------------------------ - preliminary data sheet october 2001 low-cost ringing slic l9214a/g agere systems inc. 37 ac applications (continued) design examples (continued) ac interface using first-generation codec (continued) blocking capacitors 5-6401.g (f) figure 16. ac interface using first-generation codec (including blocking capacitors) for complex termination impedance 0.1 f r tgs vtx r gx = 4750 ? txi vitr r t6 r x r t3 r hb codec output drive amp codec op amp ? + 20 c n r n1 r n2 r gp r rcv rcvn rcvp ? i t/r 318.25 c gs c b1 2.5 v c b2 preliminary data sheet october 2001 low-cost ringing slic l9214a/g 38 agere systems inc. ac applications (continued) design examples (continued) ac interface using first-generation codec (continued) 12-3535.m (f) figure 17. agere t7504 first-generation codec; complex termination with power control resistor (3 ren configuration) table 21. l9214 parts list for agere t7504 first-generation codec; complex termination with power control resistor name value tolerance rating function fault protection r pt 30 ? 1% fusible or ptc protection resistor. r pr 30 ? 1% fusible or ptc protection resistor. protector agere l7591 ? ? secondary protection. v bat1 bgnd v bat2 v cc agnd icm trgdet ground key not used c vbat1 0.1 f c vbat2 0.1 f c cc 0.1 f pr pt agere l7591 v bat1 fusible resistor 30 ? vitr rcvp rcvn itr vtx txi r gx 4750 ? r tgs c gs v bat1 v cc c tx 0.1 f 1/4 t7504 codec r t6 gsx +2.4 v r hb1 r t3 r rcv c n r gp dx dr fse fsep mclk asel control inputs sync and pcm highway clock r n2 ? + 30 ? c c2 l9214a c c1 cf1 cf2 fb1 fb2 nstat b3 b2 b1 b0 c f1 0.22 f c f2 0.1 f from/to control fusible resistor 47.5 k ? 54.9 k ? 127 k ? r n1 49.9 k ? 113 k ? 120 pf 0.1 f 0.1 f 40.6 k ? c fb1 0.01 f c fb2 0.01 f or ptc or ptc rtflt dcout i prog (i loop = 25 ma) i ref r rt2 r rt1 133 k ? c rt 1 f 75 k ? r iprog 5.76 k ? r iref 28.7 k ? vf x in r x 115 k ? vf r o 1.74 k ? 12 nf r pwr 2.0 k ? 59.0 k ? d bat1 preliminary data sheet october 2001 low-cost ringing slic l9214a/g agere systems inc. 39 applications (continued) design examples (continued) ac interface using first-generation codec (continued) table 21. l9214 parts list for agere t7504 first-generation codec; complex termination with power con- trol resistor (continued) note: t x = 0 dbm, r x = 0 dbm, termination impedance = 220 ? + (820 ? || 115 nf) , hybrid balance = 220 ? + (820 ? || 115 nf) . name value tolerance rating function power supply c vbat1 0.1 f 20% 100 v v bat filter capacitor. c vbat2 0.1 f 20% 50 v v bat filter capacitor. |v bat2 | < |v bat1 |. d bat1 1n4004 ? ? reverse current. c cc 0.1 f 20% 10 v v cc filter capacitor. c f1 0.22 f 20% 100 v filter capacitor. c f2 0.1 f 20% 100 v filter capacitor. r pwr 2.0 k ? 5% 2 w power control resistor, provides single battery supply operation. dc profile r iprog 5.76 k ? 1% 1/16 w with r iref , fixes dc current limit. r iref 28.7 k ? 1% 1/16 w with r iprog , fixes dc current limit. ringing/ring trip c ring 1.0 f 20% 10 v ring trip filter capacitor. r rt1 133 k ? 1% 1/16 w ring trip filter resistor. r rt2 75 k ? 1% 1/16 w ring trip filter resistor. c fb1 0.01 f 20% 100 v with c fb2 , slows rate of battery reversal. sets crest factor of bal- anced power ring signal. c fb2 0.01 f 20% 100 v with c fb1 , slows rate of battery reversal. sets crest factor of bal- anced power ring signal. ac interface r gx 4750 ? 1% 1/16 w sets t/r to vitr transconductance. r tgs 1.74 k ? 1% 1/16 w gain shaping for complex termination. c gs 12 nf 5% 10 v gain shaping for complex termination. c tx 0.1 f 20% 10 v ac/dc separation. c c1 0.1 f 20% 10 v dc blocking capacitor. c c2 0.1 f 20% 10 v dc blocking capacitor. r t3 49.9 k ? 1% 1/16 w with r gp and r rcv , sets termination impedance and receive gain. r t6 40.2 k ? 1% 1/16 w with r x , sets transmit gain. r x 115 k ? 1% 1/16 w with r t6 , sets transmit gain. r hb1 113 k ? 1% 1/16 w with r x , sets hybrid balance. r rcv 59.0 k ? 1% 1/16 w with r gp and r t3 , sets termination impedance and receive gain. r gp 54.9 k ? 1% 1/16 w with r rcv and r t3 , sets termination impedance and receive gain. c n 120 pf 20% 10 v high frequency compensation. r n1 127 k ? 1% 1/16 w high frequency compensation. r n2 47.5 k ? 1% 1/16 w high frequency compensation, compensate for dc offset at rcvp/rcvn. preliminary data sheet october 2001 low-cost ringing slic l9214a/g 40 agere systems inc. ac applications (continued) design examples (continued) third-generation codec ac interface network ? complex termination the following reference circuit shows the complete slic schematic for interface to the agere t8536 third-genera- tion codec. all ac parameters are programmed by the t8536. note this codec differentiates itself in that no external components are required in the ac interface to provide a dc termination impedance or for stability. please see the t8535/6 data sheet for information on coefficient programming. 12-3534.z1 (f) figure 18. third-generation codec ac interface network; complex termination (3 ren configuration) v bat1 bgnd v bat2 v cc agnd icm trgdet ground key not used c vbat1 0.1 f c vbat2 0.1 f c cc 0.1 f pr pt agere l7591 v bat1 50 ? 50 ? cf1 cf2 fb1 fb2 nstat b3 b2 b1 b0 c f1 0.22 f c f2 0.1 f vitr rcvp rcvn itr vtx txi r gx 4750 ? v bat1 v bat2 v cc c tx 0.1 f c c1 pcm highway dx0 dr0 dx1 dr1 fs bclk dgnd v dd sync and v dd vf x i vf r op vf r on slic5a slic4a slic3a slic2a slic0a clock l9214g from/to control b3 b2 b0 nstat b1 0.1 f fusible resistor or ptc or ptc fusible resistor rtflt dcout i prog (i loop = 25 ma) i ref r rt2 r rt1 133 k ? c rt 1 f 75 k ? r iprog 5.76 k ? r iref 28.7 k ? c fb1 0.01 f c fb2 0.01 f r cr c cc1 d bat1 820 pf 2 k ? 1/4 t8536 codec preliminary data sheet october 2001 low-cost ringing slic l9214a/g agere systems inc. 41 ac applications (continued) design examples (continued) third-generation codec ac interface network ? complex termination (continued) table 22. l9214 parts list for agere t8536 third-generation codec meter pulse application ac and dc parameters; fully programmable * for loop stability, increase to 50 ? minimum if synthesizing 900 ? or 900 ? + 2.16 f termination impedance. name value tolerance rating function fault protection r pt 30 ? 1% fusible or ptc protection resistor * . r pr 30 ? 1% fusible or ptc protection resistor * . protector agere l7591 ? ? secondary protection. power supply c vbat1 0.1 f 20% 100 v v bat filter capacitor. c vbat2 0.1 f 20% 50 v v bat filter capacitor. |v bat2 | < |v bat1 |. d bat1 1n4004 ? ? reverse current. c cc 0.1 f 20% 10 v v cc filter capacitor. c f1 0.22 f 20% 100 v filter capacitor. c f2 0.1 f 20% 100 v filter capacitor. dc profile r iprog 5.76 k ? 1% 1/16 w with r iref , fixes dc current limit. r iref 28.7 k ? 1% 1/16 w with r iprog , fixes dc current limit. ringing/ring trip c rt 1.0 f 20% 10 v ring trip filter capacitor. r rt1 133 k ? 1% 1/16 w ring trip filter resistor. r rt2 75 k ? 1% 1/16 w ring trip filter resistor. c fb1 0.01 f 20% 100 v with c fb2 , slows rate of battery reversal. sets crest fac- tor of balanced power ring signal. c fb2 0.01 f 20% 100 v with c fb1 , slows rate of battery reversal. sets crest fac- tor of balanced power ring signal. ac interface r gx 4750 ? 1% 1/16 w sets t/r to vitr transconductance. r cr 10 k ? 5% 1/16 w compensation resistor. c cc1 270 pf 20% 10 v compensation capacitor. c tx 0.1 f 20% 10 v ac/dc separation. c c1 0.1 f 20% 10 v dc blocking capacitor. preliminary data sheet october 2001 low-cost ringing slic l9214a/g 42 agere systems inc. outline diagrams 28-pin sog note: the dimensions in these outline diagrams are intended for informational purposes only. for detailed draw- ings to assist your design efforts, please contact your agere sales representative. 5-4414 package dimensions package description number of pins n maximum length l maximum width without leads b maximum width including leads w maximum height above board h sog (small outline gull-wing) 28 18.11 7.62 10.64 2.67 w 0.61 0.51 max h 0.28 max 0.10 seating plane 1.27 typ n l b 1 pin #1 identifier zone preliminary data sheet october 2001 low-cost ringing slic l9214a/g agere systems inc. 43 outline diagrams (continued) 32-pin plcc note: the dimensions in this outline diagram are intended for informational purposes only. for detailed schemat- ics to assist your design efforts, please contact your agere sales representative. 5-3813r2 (f) 0.10 seating plane 0.38 min typ 1.27 typ 0.330/0.533 1 430 5 13 21 29 14 20 12.446 0.127 11.430 0.076 pin #1 identifier zone 14.986 0.127 13.970 0.076 3.175/3.556 preliminary data sheet october 2001 low-cost ringing slic l9214a/g 44 agere systems inc. outline diagrams (continued) 48-pin mlcc dimensions are in millimeters. notes: the dimensions in this outline diagram are intended for informational purposes only. for detailed schemat- ics to assist your design efforts, please contact your agere sales representative. the exposed pad on the bottom of the package will be at v bat1 potential. 0195 pin #1 identifier zone 1 7.00 6.75 seating plane 0.08 0.65/0.80 0.20 ref detail a 7.00 5.10 0.15 3 3.50 3.375 6.75 0.00/0.05 section c ? c 11 spaces @ 0.50 = 5.50 0.50 bsc 0.13/0.23 0.18/0.30 0.30/0.45 0.01/0.05 1.00 max 12 0.18/0.30 0.24/0.60 0.24/0.60 2 1 3 2 0.20/0.45 0.50 bsc detail a cc view for even terminal/side c l exposed pad preliminary data sheet october 2001 low-cost ringing slic l9214a/g agere systems inc. 45 outline diagrams (continued) 48-pin mlcc, jedec mo-220 vkkd-2 dimensions are in millimeters. notes: the dimensions in this outline diagram are intended for informational purposes only. for detailed schemat- ics to assist your design efforts, please contact your agere sales representative. the exposed pad on the bottom of the package will be at v bat1 potential. 0195 index area 7.00 3.50 seating plane 0.08 0.20 ref detail a 7.00 5.00/5.25 3.50 11 spaces @ 0.50 = 5.50 0.50 bsc 0.18/0.30 0.02/0.05 1.00 max 0.23 0.30/0.50 1 3 2 (7.00/2 x 7.00/2) pin #1 identifier zone top view side view detail b 0.23 0.18 0.18 bottom view 2.50/2.625 exposed pad detail b 0.50 bsc detail a view for even terminal/side c l preliminary data sheet october 2001 low-cost ringing slic l9214a/g agere systems inc. reserves the right to make changes to the product(s) or information contained herein without notice. no liab ility is assumed as a result of their use or application. copyright ? 2001 agere systems inc. all rights reserved october 2001 ds01-144alc (replaces ds00-342alc) for additional information, contact your agere systems account manager or the following: internet: http://www.agere.com e-mail: docmaster@agere.com n. america: agere systems inc., 555 union boulevard, room 30l-15p-ba, allentown, pa 18109-3286 1-800-372-2447 , fax 610-712-4106 (in canada: 1-800-553-2448 , fax 610-712-4106) asia: agere systems hong kong ltd., suites 3201 & 3210-12, 32/f, tower 2, the gateway, harbour city, kowloon tel. (852) 3129-2000 , fax (852) 3129-2020 china: (86) 21-5047-1212 (shanghai), (86) 10-6522-5566 (beijing), (86) 755-695-7224 (shenzhen) japan: (81) 3-5421-1600 (tokyo), korea: (82) 2-767-1850 (seoul), singapore: (65) 778-8833 , taiwan: (886) 2-2725-5858 (taipei) europe: tel. (44) 7000 624624 , fax (44) 1344 488 045 ordering information * please contact your agere sales representative for availability. ul is a trademark of underwriters laboratories, inc. iec is a registered trademark of the international electrotechnical commission. ieee is a registered trademark of the institute of electrical and electronics engineers, inc. pspice is a registered trademark of microsim corporation. telcordia technologies is a trademark of bell communications research, inc. device part no. description package comcode lucl9214aaj-d slic gain = 8 28-pin sog*, dry-bagged 108553892 lucl9214aaj-dt slic gain = 8 28-pin sog*, dry-bagged, tape and reel 108553900 lucl9214aau-d slic gain = 8 32-pin plcc, dry-bagged 108697905 LUCL9214AAU-DT slic gain = 8 32-pin plcc, dry-bagged, tape and reel 108697913 lucl9214arg-d slic gain = 8 48-pin mlcc, dry-bagged 109058636 lucl9214arg-dt slic gain = 8 48-pin mlcc, dry-bagged, tape and reel 109058644 lucl9214gaj-d slic gain = 2 28-pin sog*, dry-bagged 108560723 lucl9214gaj-dt slic gain = 2 28-pin sog*, dry-bagged, tape and reel 108560731 lucl9214gau-d slic gain = 2 32-pin plcc, dry-bagged 108698309 lucl9214gau-dt slic gain = 2 32-pin plcc, dry-bagged, tape and reel 108698317 lucl9214grg-d slic gain = 2 48-pin mlcc, dry-bagged 109058651 lucl9214grg-dt slic gain = 2 48-pin mlcc, dry-bagged, tape and reel 109058669 |
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